Squash commits for public release

kernel/include/platform/riscv64/cpuinfo.h

@@ -0,0 +1,13 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_CPUINFO_H
+#define _KERNEL_PLATFORM_RISCV64_CPUINFO_H
+
+#include <libkern/c_attrs.h>
+#include <libkern/types.h>
+#include <platform/generic/cpu.h>
+
+static inline bool cpuinfo_has_1gb_pages()
+{
+    return true;
+}
+
+#endif // _KERNEL_PLATFORM_RISCV64_CPUINFO_H

kernel/include/platform/riscv64/fpu/fpu.h

@@ -0,0 +1,36 @@
+
+typedef struct {
+    uint64_t halfv[64];
+} __attribute__((aligned(FPU_STATE_ALIGNMENT))) fpu_state_t;
+
+void fpu_install();
+void fpu_init_state(fpu_state_t* new_fpu_state);
+extern void fpu_save(void*);
+extern void fpu_restore(void*);
+
+static inline void fpu_enable()
+{
+}
+
+static inline void fpu_disable()
+{
+}
+
+static inline int fpu_is_avail()
+{
+    return (((read_cpacr() >> 20) & 0b11) == 0b11);
+}
+
+static inline void fpu_make_avail()
+{
+    write_cpacr(read_cpacr() | ((0b11) << 20));
+}
+
+static inline void fpu_make_unavail()
+{
+    // Simply turn it off to make it unavailble.
+    uint64_t val = read_cpacr() & (~((3ull) << 20));
+    write_cpacr(val | ((0b01) << 20));
+}
+
+#endif //_KERNEL_PLATFORM_RISCV64_FPU_FPU_H

kernel/include/platform/riscv64/init.h

@@ -0,0 +1,10 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_INIT_H
+#define _KERNEL_PLATFORM_RISCV64_INIT_H
+
+#include <libkern/types.h>
+
+void platform_init_boot_cpu();
+void platform_setup_boot_cpu();
+void platform_setup_secondary_cpu();
+
+#endif /* _KERNEL_PLATFORM_RISCV64_INIT_H */

kernel/include/platform/riscv64/interrupts.h

@@ -0,0 +1,13 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_INTERRUPTS_H
+#define _KERNEL_PLATFORM_RISCV64_INTERRUPTS_H
+
+#include <drivers/irq/irq_api.h>
+#include <libkern/mask.h>
+#include <libkern/types.h>
+
+void interrupts_setup();
+void interrupts_setup_secondary_cpu();
+
+void plic_setup();
+
+#endif /* _KERNEL_PLATFORM_RISCV64_INTERRUPTS_H */

kernel/include/platform/riscv64/pmm/settings.h

@@ -0,0 +1,8 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_PMM_SETTINGS_H
+#define _KERNEL_PLATFORM_RISCV64_PMM_SETTINGS_H
+
+#define PMM_BLOCK_SIZE (4096)
+#define PMM_BLOCK_SIZE_KB (4)
+#define PMM_BLOCKS_PER_BYTE (8)
+
+#endif /* _KERNEL_PLATFORM_RISCV64_PMM_SETTINGS_H */

kernel/include/platform/riscv64/registers.h

@@ -0,0 +1,40 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_REGISTERS_H
+#define _KERNEL_PLATFORM_RISCV64_REGISTERS_H
+
+#include <libkern/types.h>
+#include <platform/riscv64/system.h>
+
+extern uint64_t read_ip();
+static inline uint64_t read_scause()
+{
+    uint64_t x;
+    asm volatile("csrr %0, scause"
+                 : "=r"(x));
+    return x;
+}
+
+static inline uint64_t read_stval()
+{
+    uint64_t x;
+    asm volatile("csrr %0, stval"
+                 : "=r"(x));
+    return x;
+}
+
+static inline uint64_t read_sip()
+{
+    uint64_t x;
+    asm volatile("csrr %0, sip"
+                 : "=r"(x));
+    return x;
+}
+
+static inline void write_sip(uint64_t val)
+{
+    asm volatile("csrw sip, %0"
+                 :
+                 : "r"(val)
+                 : "memory");
+}
+
+#endif /* _KERNEL_PLATFORM_RISCV64_REGISTERS_H */

kernel/include/platform/riscv64/syscalls/params.h

@@ -0,0 +1,17 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_SYSCALLS_PARAMS_H
+#define _KERNEL_PLATFORM_RISCV64_SYSCALLS_PARAMS_H
+
+#include <platform/riscv64/tasking/trapframe.h>
+
+#define SYSCALL_ID(tf) (tf->a7)
+#define SYSCALL_VAR1(tf) (tf->a0)
+#define SYSCALL_VAR2(tf) (tf->a1)
+#define SYSCALL_VAR3(tf) (tf->a2)
+#define SYSCALL_VAR4(tf) (tf->a3)
+#define SYSCALL_VAR5(tf) (tf->a4)
+#define return_val (tf->a0)
+#define return_with_val(val) \
+    (return_val = val);      \
+    return
+
+#endif // _KERNEL_PLATFORM_RISCV64_SYSCALLS_PARAMS_H

kernel/include/platform/riscv64/system.h

@@ -0,0 +1,132 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_SYSTEM_H
+#define _KERNEL_PLATFORM_RISCV64_SYSTEM_H
+
+#include <libkern/c_attrs.h>
+#include <libkern/types.h>
+#include <platform/generic/registers.h>
+
+/**
+ * INTS
+ */
+
+void system_disable_interrupts();
+void system_enable_interrupts();
+void system_enable_interrupts_only_counter();
+
+inline static void system_instruction_barrier()
+{
+    asm volatile("fence.i"
+                 :
+                 :
+                 : "memory");
+}
+
+inline static void system_data_synchronise_barrier()
+{
+    asm volatile("fence.i"
+                 :
+                 :
+                 : "memory");
+}
+
+inline static void system_data_memory_barrier()
+{
+    asm volatile("fence"
+                 :
+                 :
+                 : "memory");
+}
+
+inline static void system_disable_interrupts_no_counter()
+{
+    system_instruction_barrier();
+    asm volatile("csrc sstatus, 0x3");
+    system_instruction_barrier();
+}
+
+inline static void system_enable_interrupts_no_counter()
+{
+    system_instruction_barrier();
+    asm volatile("csrs sstatus, 0x3");
+    system_instruction_barrier();
+}
+
+/**
+ * PAGING
+ */
+
+inline static void system_set_pdir(uintptr_t pdir0, uintptr_t pdir1)
+{
+    system_data_synchronise_barrier();
+    asm volatile("csrw satp, %0"
+                 :
+                 : "r"((9L << 60) | (pdir0 >> 12)));
+    system_instruction_barrier();
+}
+
+inline static void system_flush_local_tlb_entry(uintptr_t vaddr)
+{
+    asm volatile("sfence.vma %0, zero"
+                 :
+                 : "r"(vaddr)
+                 : "memory");
+}
+
+inline static void system_flush_all_cpus_tlb_entry(uintptr_t vaddr)
+{
+    asm volatile("sfence.vma %0, zero"
+                 :
+                 : "r"(vaddr)
+                 : "memory");
+}
+
+inline static void system_flush_whole_tlb()
+{
+    asm volatile("sfence.vma %0, zero"
+                 :
+                 : "r"(-1)
+                 : "memory");
+}
+
+inline static void system_enable_write_protect()
+{
+}
+
+inline static void system_disable_write_protect()
+{
+}
+
+inline static void system_enable_paging()
+{
+}
+
+inline static void system_disable_paging()
+{
+}
+
+inline static void system_stop_until_interrupt()
+{
+    asm volatile("wfi");
+}
+
+NORETURN inline static void system_stop()
+{
+    system_disable_interrupts();
+    system_stop_until_interrupt();
+    while (1) { }
+}
+
+void system_cache_invalidate(void* addr, size_t size);
+void system_cache_clean_and_invalidate(void* addr, size_t size);
+void system_cache_clean(void* addr, size_t size);
+
+/**
+ * CPU
+ */
+
+inline static int system_cpu_id()
+{
+    return 0;
+}
+
+#endif /* _KERNEL_PLATFORM_RISCV64_SYSTEM_H */

kernel/include/platform/riscv64/tasking/context.h

@@ -0,0 +1,23 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_TASKING_CONTEXT_H
+#define _KERNEL_PLATFORM_RISCV64_TASKING_CONTEXT_H
+
+#include <libkern/c_attrs.h>
+#include <libkern/types.h>
+
+typedef struct {
+    uint64_t ra;
+    uint64_t sp;
+    uint64_t s[12];
+} PACKED context_t;
+
+static inline uintptr_t context_get_instruction_pointer(context_t* ctx)
+{
+    return ctx->ra;
+}
+
+static inline void context_set_instruction_pointer(context_t* ctx, uintptr_t ip)
+{
+    ctx->ra = ip;
+}
+
+#endif // _KERNEL_PLATFORM_RISCV64_TASKING_CONTEXT_H

kernel/include/platform/riscv64/tasking/dump_impl.h

@@ -0,0 +1,12 @@
+#ifndef _KERNEL_PLATFORM_ARM64_TASKING_DUMP_IMPL_H
+#define _KERNEL_PLATFORM_ARM64_TASKING_DUMP_IMPL_H
+
+#include <libkern/types.h>
+#include <tasking/bits/dump.h>
+#include <tasking/tasking.h>
+
+int dump_impl(dump_data_t* data);
+int dump_kernel_impl(dump_data_t* dump_data, const char* err_desc);
+int dump_kernel_impl_from_tf(dump_data_t* dump_data, const char* err_desc, trapframe_t* tf);
+
+#endif // _KERNEL_PLATFORM_ARM64_TASKING_DUMP_IMPL_H

kernel/include/platform/riscv64/tasking/signal_impl.h

@@ -0,0 +1,10 @@
+#ifndef _KERNEL_PLATFORM_ARM64_TASKING_SIGNAL_IMPL_H
+#define _KERNEL_PLATFORM_ARM64_TASKING_SIGNAL_IMPL_H
+
+#include <libkern/types.h>
+struct thread;
+
+int signal_impl_prepare_stack(struct thread* thread, int signo, uintptr_t old_sp, uintptr_t magic);
+int signal_impl_restore_stack(struct thread* thread, uintptr_t* old_sp, uintptr_t* magic);
+
+#endif // _KERNEL_PLATFORM_ARM64_TASKING_SIGNAL_IMPL_H

kernel/include/platform/riscv64/tasking/trapframe.h

@@ -0,0 +1,126 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_TASKING_TRAPFRAME_H
+#define _KERNEL_PLATFORM_RISCV64_TASKING_TRAPFRAME_H
+
+#include <libkern/c_attrs.h>
+#include <libkern/log.h>
+#include <libkern/types.h>
+
+typedef struct {
+    uint64_t ra;
+    uint64_t sp;
+    uint64_t gp;
+    uint64_t tp;
+    uint64_t t0;
+    uint64_t t1;
+    uint64_t t2;
+    uint64_t s0;
+    uint64_t s1;
+    uint64_t a0;
+    uint64_t a1;
+    uint64_t a2;
+    uint64_t a3;
+    uint64_t a4;
+    uint64_t a5;
+    uint64_t a6;
+    uint64_t a7;
+    uint64_t s2;
+    uint64_t s3;
+    uint64_t s4;
+    uint64_t s5;
+    uint64_t s6;
+    uint64_t s7;
+    uint64_t s8;
+    uint64_t s9;
+    uint64_t s10;
+    uint64_t s11;
+    uint64_t t3;
+    uint64_t t4;
+    uint64_t t5;
+    uint64_t t6;
+    uint64_t sstatus;
+    uint64_t epc;
+} PACKED trapframe_t;
+
+static inline uintptr_t get_stack_pointer(trapframe_t* tf)
+{
+    return tf->sp;
+}
+
+static inline void set_stack_pointer(trapframe_t* tf, uintptr_t sp)
+{
+    tf->sp = sp;
+}
+
+static inline uintptr_t get_frame_pointer(trapframe_t* tf)
+{
+    return 0;
+}
+
+static inline void set_frame_pointer(trapframe_t* tf, uintptr_t bp)
+{
+}
+
+static inline uintptr_t get_instruction_pointer(trapframe_t* tf)
+{
+    return tf->epc;
+}
+
+static inline void set_instruction_pointer(trapframe_t* tf, uintptr_t ip)
+{
+    tf->epc = ip;
+}
+
+static inline uintptr_t get_syscall_result(trapframe_t* tf)
+{
+    return tf->a0;
+}
+
+static inline void set_syscall_result(trapframe_t* tf, uintptr_t val)
+{
+    tf->a0 = val;
+}
+
+/**
+ * STACK FUNCTIONS
+ */
+
+static inline void tf_push_to_stack(trapframe_t* tf, uintptr_t val)
+{
+    tf->sp -= sizeof(uintptr_t);
+    *((uintptr_t*)tf->sp) = val;
+}
+
+static inline uintptr_t tf_pop_to_stack(trapframe_t* tf)
+{
+    uintptr_t val = *((uintptr_t*)tf->sp);
+    tf->sp += sizeof(uintptr_t);
+    return val;
+}
+
+static inline void tf_move_stack_pointer(trapframe_t* tf, int32_t val)
+{
+    tf->sp += val;
+}
+
+#define SSTATUS_VM (1L << 18) // VM
+#define SSTATUS_SPP (1L << 8) // Previous mode, 1=Supervisor, 0=User
+#define SSTATUS_SPIE (1L << 5) // Supervisor Previous Interrupt Enable
+#define SSTATUS_UPIE (1L << 4) // User Previous Interrupt Enable
+#define SSTATUS_SIE (1L << 1) // Supervisor Interrupt Enable
+#define SSTATUS_UIE (1L << 0) // User Interrupt Enable
+
+static inline void tf_setup_as_user_thread(trapframe_t* tf)
+{
+    tf->sstatus = SSTATUS_VM | SSTATUS_UPIE | SSTATUS_SPIE;
+}
+
+static inline void tf_setup_as_kernel_thread(trapframe_t* tf)
+{
+    tf->sstatus = SSTATUS_VM | SSTATUS_SPP | SSTATUS_SPIE;
+}
+
+static void dump_tf(trapframe_t* tf)
+{
+}
+
+#endif // _KERNEL_PLATFORM_RISCV64_TASKING_TRAPFRAME_H

kernel/include/platform/riscv64/vmm/consts.h

@@ -0,0 +1,37 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_VMM_CONSTS_H
+#define _KERNEL_PLATFORM_RISCV64_VMM_CONSTS_H
+
+#include <libkern/types.h>
+
+static inline int vm_page_size()
+{
+    return 0x1000;
+}
+
+static inline int vm_page_mask()
+{
+    return 0xfff;
+}
+
+#define VMM_LV0_ENTITY_COUNT (512)
+#define VMM_LV1_ENTITY_COUNT (512)
+#define VMM_LV2_ENTITY_COUNT (512)
+#define VMM_LV3_ENTITY_COUNT (512)
+#define VMM_PAGE_SIZE (vm_page_size())
+
+#define PAGE_START(vaddr) ((vaddr & (~(uintptr_t)vm_page_mask())))
+#define FRAME(addr) (addr / VMM_PAGE_SIZE)
+
+#define PTABLE_LV_TOP (3)
+#define PTABLE_LV0_VADDR_OFFSET (12)
+#define PTABLE_LV1_VADDR_OFFSET (21)
+#define PTABLE_LV2_VADDR_OFFSET (30)
+#define PTABLE_LV3_VADDR_OFFSET (39)
+
+#define PTABLE_TOP_KERNEL_OFFSET (VMM_LV3_ENTITY_COUNT / 2)
+
+#define USER_HIGH 0x7fffffffffff
+#define KERNEL_BASE 0xffff800000000000
+#define KERNEL_PADDR_BASE 0xffffffff00000000 // TODO(x64): up to 4gbs are supported.
+
+#endif // _KERNEL_PLATFORM_RISCV64_VMM_CONSTS_H

kernel/include/platform/riscv64/vmm/mmu.h

@@ -0,0 +1,30 @@
+#ifndef _KERNEL_PLATFORM_RISCV64_VMM_MMU_H
+#define _KERNEL_PLATFORM_RISCV64_VMM_MMU_H
+
+#include <libkern/types.h>
+#include <mem/bits/mmu.h>
+
+// riscv64 uses one table to manage virtual space.
+#undef DOUBLE_TABLE_PAGING
+
+typedef uint64_t ptable_entity_t;
+typedef uint64_t arch_pf_info_t;
+
+ptable_entity_t vm_mmu_to_arch_flags(mmu_flags_t mmu_flags, ptable_lv_t lv);
+mmu_flags_t vm_arch_to_mmu_flags(ptable_entity_t* entity, ptable_lv_t lv);
+mmu_pf_info_flags_t vm_arch_parse_pf_info(arch_pf_info_t info);
+
+void vm_ptable_entity_set_default_flags(ptable_entity_t* entity, ptable_lv_t lv);
+void vm_ptable_entity_allocated(ptable_entity_t* entity, ptable_lv_t lv);
+void vm_ptable_entity_invalidate(ptable_entity_t* entity, ptable_lv_t lv);
+
+void vm_ptable_entity_set_mmu_flags(ptable_entity_t* entity, ptable_lv_t lv, mmu_flags_t mmu_flags);
+void vm_ptable_entity_rm_mmu_flags(ptable_entity_t* entity, ptable_lv_t lv, mmu_flags_t mmu_flags);
+void vm_ptable_entity_set_frame(ptable_entity_t* entity, ptable_lv_t lv, uintptr_t frame);
+uintptr_t vm_ptable_entity_get_frame(ptable_entity_t* entity, ptable_lv_t lv);
+
+ptable_state_t vm_ptable_entity_state(ptable_entity_t* entity, ptable_lv_t lv);
+bool vm_ptable_entity_is_present(ptable_entity_t* entity, ptable_lv_t lv);
+bool vm_ptable_entity_is_only_allocated(ptable_entity_t* entity, ptable_lv_t lv);
+
+#endif // _KERNEL_PLATFORM_RISCV64_VMM_MMU_H